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Silicon Labs /BGM220PC22WGA /GPIO_S /EXTIPSELH

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Interpret as EXTIPSELH

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PORTA)EXTIPSEL0 0 (PORTA)EXTIPSEL1 0 (PORTA)EXTIPSEL2 0 (PORTA)EXTIPSEL3

EXTIPSEL1=PORTA, EXTIPSEL3=PORTA, EXTIPSEL0=PORTA, EXTIPSEL2=PORTA

Description

External interrupt Port Select High

Fields

EXTIPSEL0

External Interrupt Port Select

0 (PORTA): Port A group selected

1 (PORTB): Port B group selected

2 (PORTC): Port C group selected

3 (PORTD): Port D group selected
EXTIPSEL1

External Interrupt Port Select

0 (PORTA): Port A group selected

1 (PORTB): Port B group selected

2 (PORTC): Port C group selected

3 (PORTD): Port D group selected
EXTIPSEL2

External Interrupt Port Select

0 (PORTA): Port A group selected

1 (PORTB): Port B group selected

2 (PORTC): Port C group selected

3 (PORTD): Port D group selected
EXTIPSEL3

External Interrupt Port Select

0 (PORTA): Port A group selected

1 (PORTB): Port B group selected

2 (PORTC): Port C group selected

3 (PORTD): Port D group selected

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data